Professor
Sung-Woong Chung
Department of Semiconductor Engineering, POSTECH
 | Office +82-54-279-2365 |
 | swchung@postech.ac.kr |
 | 419-1 C5, 80, Jigok-ro, Nam-gu, Pohang-si, Gyeongsangbuk-do, Republic of Korea [37666] |
 | +82-10-3106-7622 |
Professor
Sung-Woong Chung
Department of Semiconductor Engineering, POSTECH
 | Office +82-54-279-2365 |
 | swchung@postech.ac.kr |
 | 419-1 C5, 80, Jigok-ro, Nam-gu, Pohang-si, Gyeongsangbuk-do, Republic of Korea [37666] |
 | +82-10-3106-7622 |
Education
1992-1996
Korea Advanced Institute of Science and Technology(KAIST), Daejeon, Korea, MS (Ph.D.)
1990-1992
Korea Advanced Institute of Science and Technology(KAIST), Daejeon, Korea, MS (M.S.)
1986-1990
Korea Advanced Institute of Science and Technology(KAIST), Daejeon, Korea, Physics (B.S.)
Professional Experience
2023-present
Professor, Pohang University of Science and Technology
2020-2022
Vice President, R&D, SK Materials
2014-2019
Research Fellow, R&D, SK Hynix
2008-2014
Team leader, new tech innovation, SK Hynix
2005-2007
DRAM non-planar transistor researcher, Hynix
2000-2004
Advanced process researcher, Hynix
1996-1999
Advanced process researcher, LG Semicon
Major Technical Contributions
2008-2019
Contributed to the Spin Transfer Torque Magnetic RAM
2008-2012
Initiation of emerging memory development
2005-2008
Commercialized 3D transistor for DRAM cell
1996-2004
Shallow trench isolation technology
Research Interest
Emerging New Memory: Architecture, highly efficient sensing circuit, and cell technology
DRAM scaling technology (Offset reduction latch transistor technology and EUV patterning process, high-k dielectrics)
Neuromorphic computing architecture including synaptic device and operators
Low power technologies such as low-k dielectrics and low resistivity materials.
Process integration and Access device for 3D stacked memory and related new process
Surface reaction for Self-limiting area selective ALD and ALE
High performance device and process integration for PIM (Processor in Memory)
Spin devices such as STT, SOT
Statistical approach for data science and machine learning algorithm
419-1 C5, 80, Jigok-ro, Nam-gu, Pohang-si,
Gyeongsangbuk-do, Republic of Korea [37666]
swchung@postech.ac.kr
©2023 INNOVATIVE MEMORY PROCESS AND DEVICE. ALL RIGHTS RESERVED.
419-1 C5, 80, Jigok-ro, Nam-gu, Pohang-si, Gyeongsangbuk-do, Republic of Korea [37666]
swchung@postech.ac.kr
©2023 INNOVATIVE MEMORY PROCESS AND DEVICE. ALL RIGHTS RESERVED.
