Conference
“Shallow Trench Isolation Characteristics with High-Density-Plasma (HDP) CVD Gap-Fill Oxide for Deep-Submicron CMOS Technologies”
Seungho Lee, Kuchul Jung, Jeonghwan Son, Sungwoong Chung, Minchul Chae, Junyong Kim, Wouns Yang, Youngiong Lee, Jeongmo Hwang
International Conference on Solid State Devices and Materials, IIanlamatsu,1997, pp.524-525
“Optimization of repeater size to minimize interconnect line-induced delay time for high performance VLSI circuits”
Myoung-Jun Jang;Hi-Deok Lee;Myoung-Kyu Park;Hae-Wang Lee;Kyung-Jin Yoo;Sang-Bok Lee;Sung-Woong Chung;Dae-Gwan Kang;Jeong-Mo Hwang
ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361), 1999
“Integration of Intermetal Dielectrics using Hydrogen Silsesquioxane Spin-On-Glass for sub-Quarter Micron 5 level interconnect Systems.”
Sung-Woong Chung, Jin Woong Kim, Dae-Won Suh, Nae-Hak Park, Jin-Won Park, Jae-Jeong Kim
Proc. Dielectrics for ULSI Multilevel interconnection conference (DUMIC) 1998, 151-154
419-1 C5, 80, Jigok-ro, Nam-gu, Pohang-si,
Gyeongsangbuk-do, Republic of Korea [37666]
swchung@postech.ac.kr
©2023 INNOVATIVE MEMORY PROCESS AND DEVICE. ALL RIGHTS RESERVED.
419-1 C5, 80, Jigok-ro, Nam-gu, Pohang-si, Gyeongsangbuk-do, Republic of Korea [37666]
swchung@postech.ac.kr
©2023 INNOVATIVE MEMORY PROCESS AND DEVICE. ALL RIGHTS RESERVED.