IMPD

2017 Conference 2

2

“A 4Gb LPDDR2 STT-MRAM with compact 9F2 1T1MTJ cell and hierarchical bitline architecture”

2023-09-12

“A 4Gb LPDDR2 STT-MRAM with compact 9F2 1T1MTJ cell and hierarchical bitline architecture”

Kwangmyoung Rho, Kenji Tsuchida, Dongkeun Kim, Yutaka Shirai, Jihyae Bae, Tsuneo Inaba, Hiromi Noro, Hyunin Moon, Sung-Woong Chung, Kazumasa Sunouchi, Jinwon Park, Kiseon Park, Akihito Yamamoto, Seoungju Chung, Hyeongon Kim, Hisato Oyamatsu, Jonghoon Oh

IEEE International Solid- State Circuits Conference - (ISSCC), 2017

1

“4Gb perpendicular STT-MRAM with compact cell structure and beyond”

2023-09-12

“4Gb perpendicular STT-MRAM with compact cell structure and beyond”

T. Kishi, M. Yoshikawa, T. Nagase, Hirokazu Aikawa, Sung-Woong Chung, J. Park, H. Kanaya, , K. Park, G. Kim, M. Lee, K. Sunouchi, A. Yamamoto, K. Rho, K. Tsuchida, ,J. Yi, ,H. Kim, Y. Chun, S. Hong, H. Oyamatsu

2017 IEEE International Magnetics Conference (INTERMAG), April 2017

2 “A 4Gb LPDDR2 STT-MRAM with compact 9F2 1T1MTJ cell and hierarchical bitline architecture”

1 “4Gb perpendicular STT-MRAM with compact cell structure and beyond”

2

“A 4Gb LPDDR2 STT-MRAM with compact 9F2 1T1MTJ cell and hierarchical bitline architecture”

1

“4Gb perpendicular STT-MRAM with compact cell structure and beyond”