IMPD

2011 Conference 2

2

“Offset buried metal gate vertical floating body memory technology with excellent retention time for DRAM application”

2023-09-12

“Offset buried metal gate vertical floating body memory technology with excellent retention time for DRAM application”

Sang-Min Hwang, S. Banna, C. Tang, S. Bhardwaj, M. Gupta, T. Thurgate, D. Kim, Jungtae Kwon, Joong-Sik Kim, Seung-Hwan Lee, J.-Y. Lee, S.-J. Chung, Jung W. Park, Sung-Woong Chung, Sang-Bock Cho, J.-S. Roh, Jiho Lee, Michael Van Buskirk, S.-J. Hong

Digest of Technical Papers - Symposium on VLSI Technology, 2011

1

“The Effect of Tunnel Barrier at Resistive Switching Device for Low Power Memory Applications”

2023-09-12

“The Effect of Tunnel Barrier at Resistive Switching Device for Low Power Memory Applications”

Hyejung Choi, Jaeyun Yi, Sangmin Hwang, Sangkeum Lee, Seokpyo Song, Seunghwan Lee, Jaeyeon Lee, Donghee Son, Jinwon Park, Suk-Ju Kim, Ja-Yong Kim, Sunghoon Lee, Jiwon Moon, Choidong Kim, Jungwoo Park, Moonsig Joo, JaeSung Roh, Sungki Park, Sung-Woong Chung, Junghoon Rhee, Sung Joo Hong

2011 3rd IEEE International Memory Workshop (IMW)

2 “Offset buried metal gate vertical floating body memory technology with excellent retention time for DRAM application”

1 “The Effect of Tunnel Barrier at Resistive Switching Device for Low Power Memory Applications”

2

“Offset buried metal gate vertical floating body memory technology with excellent retention time for DRAM application”

1

“The Effect of Tunnel Barrier at Resistive Switching Device for Low Power Memory Applications”