Conference
“Highly reliable and fast nonvolatile hybrid switching ReRAM memory using thin Al2O3 demonstrated at 54nm memory array”
Jaeyun Yi, Hyejung Choi, Seunghwan Lee, Jaeyeon Lee, Donghee Son, Sangkeum Lee, Sangmin Hwang, Seokpyo Song, Jinwon Park, Sookjoo Kim, Wangee Kim, Ja-Yong Kim, Sunghoon Lee, Jiwon Moon, Jinju You, Moonsig Joo, JaeSung Roh, Sungki Park, Sung-Woong Chung, Junghoon Lee, Sung-Joo Hong
Digest of Technical Papers - Symposium on VLSI Technology, 2010
“Fully integrated 54nm STT-RAM with the smallest bit cell dimension for high density memory application”
Suock Chung, K.-M. Rho, Sung-Doo Kim, H.-J. Suh, Do Jin Kim, H.J. Kim, S.H. Lee, J.-H. Park, H.-M. Hwang, S.-M. Hwang, J.-Y. Lee, Y.-B. An, J.-U. Yi, Y.-H. Seo, D.-H. Jung, M.-S. Lee, Sang-Bock Cho, J.-N. Kim, G.-J. Park, Gyuan Jin, A. Driskill-Smith, Vladimir Nikitin, Adrian E Ong, X. Tang, Yongki Kim, J.-S. Rho, S.-K. Park, Sung-Woong Chung, J.-G. Jeong, S.J. Hong
Proc. International Electron Devices Meeting (IEDM), 2010
“Vertical Double Gate Z-RAM technology with remarkable low voltage operation for DRAM application”
Joong-Sik Kim, Sung-Woong Chung, Tae-Su Jang, Seung-Hwan Lee, Dong-Hee Son, Seoung-Ju Chung, Sang-Min Hwang, Srinivasa Banna, Sunil Bhardwaj, Mayank Gupta, Jungtae Kwon, David Kim
Digest of Technical Papers - Symposium on VLSI Technology, 2010
419-1 C5, 80, Jigok-ro, Nam-gu, Pohang-si,
Gyeongsangbuk-do, Republic of Korea [37666]
swchung@postech.ac.kr
©2023 INNOVATIVE MEMORY PROCESS AND DEVICE. ALL RIGHTS RESERVED.
419-1 C5, 80, Jigok-ro, Nam-gu, Pohang-si, Gyeongsangbuk-do, Republic of Korea [37666]
swchung@postech.ac.kr
©2023 INNOVATIVE MEMORY PROCESS AND DEVICE. ALL RIGHTS RESERVED.