IMPD

2006 Conference 1

1

“Highly Scalable Saddle-Fin(S-Fin) transistor for sub-50nm DRAM technology”

2023-09-12

“Highly Scalable Saddle-Fin(S-Fin) transistor for sub-50nm DRAM technology”

Sung-Woong Chung, Sang-Don Lee, Se-Aug Jang, Min-Soo Yoo, Kwang-Ok Kim, Chai-O Chung, Sung Yoon Cho, Heung-Jae Cho, Lae-Hee Lee, Sun-Hwan Hwang, Jin-Soo Kim, Bong-Hoon Lee, Hyo Geun Yoon, Hyung-Soon Park, Seung-Joo Baek, Yun-Seok Cho, Noh-Jung Kwak, Hyunchul Sohn, Seung-Chan Moon, Kyung-Dong Yoo, Jae-Goan Jeong, Jin-Woong Kim, Sung-Joo Hong, Sung-Wook Park

Digest of Technical Papers - Symposium on VLSI Technology, 2006

1 “Highly Scalable Saddle-Fin(S-Fin) transistor for sub-50nm DRAM technology”

1

“Highly Scalable Saddle-Fin(S-Fin) transistor for sub-50nm DRAM technology”